FEATURES:

• Choose among the following memory organizations:

IDT72V2101 ⎯ 262,144 x 9

IDT72V2111 ⎯ 524,288 x 9

• Pin-compatible with the IDT72V261/72V271 and the IDT72V281/

72V291 SuperSync FIFOs

• 10ns read/write cycle time (6.5ns access time)

• Fixed, low first word data latency time

• 5V input tolerant

• Auto power down minimizes standby power consumption

• Master Reset clears entire FIFO

• Partial Reset clears data, but retains programmable settings

• Retransmit operation with fixed, low first word data latency time

• Empty, Full and Half-Full flags signal FIFO status

• Programmable Almost-Empty and Almost-Full flags, each flag can

default to one of two preselected offsets

• Program partial flags by either serial or parallel means

• Select IDT Standard timing (using EF and FF flags) or First Word Fall

Through timing (using OR and IR flags)

• Output enable puts data outputs into high impedance state

• Easily expandable in depth and width

• Independent Read and Write clocks (permit reading and writing

simultaneously)

72V2111L15PFGI8属于集成电路（IC） > FIFO 存储器。瑞萨科技有限公司制造生产的72V2111L15PFGI8FIFO 存储器先入先出 (FIFO) 存储器可用于数字信息的短期存储，其中信息检索顺序和序列与信息存储顺序和序列相同。这类产品又称为队列或缓冲存储器，通常用于在单独的设备之间交换信息，尤其是在数据以不同的速率或在略微不同的时间点生成和使用的情况下。