49FCT3805A中文资料3.3V CMOS Buffer/Clock Driver数据手册Renesas规格书

描述 Description

The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a \"heartbeat\" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3805 also allows single point-topoint transmission line driving in applications such as address distribution, where one signal must be distributed to multiple recievers with low skew and high signal quality. For more information on using the FCT3805 with two different input frequencies on bank A and B, please see AN-236.

特性 Features

0.5 MICRON CMOS Technology
Guaranteed low skew < 500ps (max.)
Very low duty cycle distortion < 1.0ns (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
Inputs can be driven from 3.3V or 5V components
Two independent output banks with 3-state control
1:5 fanout per bank
\"Heartbeat\" monitor output
VCC = 3.3V ± 0.3V
Available in SSOP, SOIC, and QSOP packages