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3D7522-0.5中文资料DATADELAY数据手册PDF规格书

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厂商型号

3D7522-0.5

功能描述

MONOLITHIC MANCHESTER DECODER

文件大小

257.029 Kbytes

页面数量

4

生产厂商

DATADELAY

网址

网址

数据手册

下载地址一下载地址二

更新时间

2025-10-11 18:45:00

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3D7522-0.5规格书详情

FUNCTIONAL DESCRIPTION

The 3D7522 product family consists of monolithic CMOS Manchester Decoders. The unit accepts at the RX input a bi-phase-level, embedded-clock signal. In this encoding mode, a logic one is represented by a high-to-low transition within the bit cell, while a logic zero is represented by a low-to-high transition. The recovered clock and data signals are presented on CLK and DATB, respectively, with the data signal inverted. The operating baud rate (in MBaud) is specified by the dash number. The input baud rate may vary by as much as ±15 from the nominal device baud rate without compromising the integrity of the information received.

FEATURES

• All-silicon, low-power CMOS technology

• TTL/CMOS compatible inputs and outputs

• Vapor phase, IR and wave solderable

• Low ground bounce noise

• Maximum data rate: 50 MBaud

• Data rate range: ±15

• Lock-in time: 1 bit

产品属性

  • 型号:

    3D7522-0.5

  • 制造商:

    DATADELAY

  • 制造商全称:

    Data Delay Devices, Inc.

  • 功能描述:

    MONOLITHIC MANCHESTER DECODER

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