MONOLITHIC 5-TAP FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8.0ns through 100ns. The in

文件：256.26 Kbytes 页数：4 Pages

DATADELAY

MONOLITHIC 5-TAP FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8.0ns through 100ns. The in

文件：256.26 Kbytes 页数：4 Pages

DATADELAY

MONOLITHIC 5-TAP FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8.0ns through 100ns. The in

文件：256.26 Kbytes 页数：4 Pages

DATADELAY

MONOLITHIC 5-TAP FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8.0ns through 100ns. The in

文件：256.26 Kbytes 页数：4 Pages

DATADELAY

MONOLITHIC 5-TAP FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8.0ns through 100ns. The in

文件：256.26 Kbytes 页数：4 Pages

DATADELAY

MONOLITHIC 5-TAP FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8.0ns through 100ns. The in

文件：256.26 Kbytes 页数：4 Pages

DATADELAY

MONOLITHIC 5-TAP FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8.0ns through 100ns. The in

文件：256.26 Kbytes 页数：4 Pages

DATADELAY

MONOLITHIC 5-TAP FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8.0ns through 100ns. The in

文件：256.26 Kbytes 页数：4 Pages

DATADELAY

MONOLITHIC 5-TAP FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8.0ns through 100ns. The in

文件：256.26 Kbytes 页数：4 Pages

DATADELAY

MONOLITHIC 5-TAP FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 8.0ns through 100ns. The in

文件：256.26 Kbytes 页数：4 Pages

DATADELAY