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3D7105Z-2.5中文资料PDF规格书
3D7105Z-2.5规格书详情
FUNCTIONAL DESCRIPTION
The 3D7105 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 0.75ns through 8.0ns. The input is reproduced at the outputs without inversion, shifted in time as per the user-specified dash number. The 3D7105 is TTL- and CMOScompatible, capable of driving ten 74LS-type loads, and features both rising- and falling-edge accuracy.
FEATURES
• All-silicon, low-power CMOS technology
• TTL/CMOS compatible inputs and outputs
• Vapor phase, IR and wave solderable
• Auto-insertable (DIP pkg.)
• Low ground bounce noise
• Leading- and trailing-edge accuracy
• Delay range: .75 through 80ns
• Delay tolerance: 5 or 1ns
• Temperature stability: ±3 typical (0C-70C)
• Vdd stability: ±1 typical (4.75V-5.25V)
• Minimum input pulse width: 30 of total delay
• 14-pin DIP and 16-pin SOIC available as drop-in replacements for hybrid delay lines
产品属性
- 型号:
3D7105Z-2.5
- 制造商:
DATADELAY
- 制造商全称:
Data Delay Devices, Inc.
- 功能描述:
MONOLITHIC 5-TAP FIXED DELAY LINE(SERIES 3D7105)
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
DATADELAY |
23+ |
NA/ |
3738 |
原装现货,当天可交货,原型号开票 |
询价 | ||
23+ |
DIP14 |
20000 |
原厂原装正品现货 |
询价 | |||
DATADELAY |
116 |
原装正品长期供货,如假包赔包换 徐小姐13714450367 |
询价 | ||||
NA |
1815+ |
DIP14 |
6528 |
只做原装正品假一赔十为客户做到零风险!! |
询价 | ||
DATADELAYDEVICES |
22+ |
DIP16 |
12245 |
现货,原厂原装假一罚十! |
询价 | ||
DataDelayDevices |
650 |
公司优势库存 热卖中!! |
询价 | ||||
DATADELAY |
2022 |
SOP14 |
80000 |
原装现货,OEM渠道,欢迎咨询 |
询价 | ||
08+ |
SOP |
5000 |
询价 | ||||
DATADELAY |
23+ |
589610 |
新到现货 原厂一手货源 价格秒杀代理! |
询价 | |||
DATA |
22+ |
SOP16 |
3785 |
绝对原装公司现货! |
询价 |