3D3521D中文资料DATADELAY数据手册PDF规格书

FUNCTIONAL DESCRIPTION

The 3D3521 is a monolithic CMOS Manchester Encoder. The clock and data, present at the unit input, are combined into a single bi-phaselevel signal. In this encoding mode, a logic one is represented by a high-to-low transition within the bit cell, while a logic zero is represented by a low-to-high transition. The unit operating baud rate (in Mbaud) is equal to the input clock frequency (in MHZ). All pins marked N/C must be left unconnected.

FEATURES

• All-silicon, low-power CMOS technology

• 3.3V operation

• CMOS compatible inputs and outputs

• Vapor phase, IR and wave solderable

• Auto-insertable (DIP pkg.)

• Low ground bounce noise

• Maximum data rate: 50 MBaud