3D3225S-2.5中文资料DATADELAY数据手册PDF规格书

FUNCTIONAL DESCRIPTION

The 3D3225 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 0.75ns through 700ns. The input is reproduced at the outputs without inversion, shifted in time as per the user-specified dash number. The 3D3225 is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads, and features both rising- and falling-edge accuracy.

FEATURES

• All-silicon, low-power CMOS technology

• TTL/CMOS compatible inputs and outputs

• Vapor phase, IR and wave solderable

• Auto-insertable (DIP pkg.)

• Low ground bounce noise

• Leading- and trailing-edge accuracy

• Delay range: 0.75ns through 3500ns

• Delay tolerance: 2 or 0.5ns

• Temperature stability: ±2 typical (-40C to 85C)

• Vdd stability: ±1 typical (3.0V-3.6V)

• Minimum input pulse width: 30 of total delay

• 8-pin Gull-Wing available as drop-in replacement for hybrid delay lines