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General Description

The SY69753AL is a complete Clock Recovery and Data Retiming integrated circuit for OC-3/STS-3 applications at 155Mbps NRZ. The device is ideally suited for SONET/SDH/ATM applications and other high-speed data transmission systems.

Clock recovery and data retiming is performed by synchronizing the on-chip VCO directly to the incoming data stream. The VCO center frequency is controlled by the reference clock frequency and the selected divide ratio. On-chip clock generation is performed through the use of a frequency multiplier PLL with a byte rate source as reference.

The SY69753AL also includes a link fault detection circuit.

Datasheets and support documentation can be found on Micrel’s web site at: www.micrel.com.

特性 Features

• 3.3V power supply

• SONET/SDH/ATM compatible

• Clock and data recovery for 125Mbps/155Mbps NRZ data stream

• Two on-chip PLLs: one for clock generation and another for clock recovery

• Selectable reference frequencies

• Differential PECL high-speed serial I/O

• Line receiver input: no external buffering needed

• Link fault indication

• 100k ECL compatible I/O

• Industrial temperature range (–40°C to +85°C)

• Lower power: fully compatible with Micrel’s SY87701V, but with 30% less power

• Available in 32-pin EPAD-TQFP

Applications

• Ethernet media converter(m)

• SONET/SDH/ATM OC-3

• Proprietary architecture at 120Mbps to 180Mbps