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UPD488448FF-C80-45-DQ2中文资料PDF规格书

UPD488448FF-C80-45-DQ2
厂商型号

UPD488448FF-C80-45-DQ2

功能描述

128 M-bit Direct Rambus??DRAM

文件大小

1.9028 Mbytes

页面数量

30

生产厂商 Renesas Electronics America
企业简称

NEC瑞萨

中文名称

瑞萨科技有限公司官网

原厂标识
数据手册

下载地址一下载地址二

更新时间

2024-5-26 11:31:00

UPD488448FF-C80-45-DQ2规格书详情

Description

The Direct Rambus DRAM (Direct RDRAM) is a general purpose high-performance memory device suitable for use in a broad range of applications including computer memory, graphics, video, and any other application where high bandwidth and low latency are required.

The µPD488448 is 128M-bit Direct Rambus DRAM (RDRAM), organized as 8M words by 16 bits. The use of Rambus Signaling Level (RSL) technology permits 600 MHz to 800 MHz transfer rates while using conventional system and board design technologies. Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per two bytes (10 ns per sixteen bytes).

The architecture of the Direct RDRAMs allows the highest sustained bandwidth for multiple, simultaneous randomly addressed memory transactions. The separate control and data buses with independent row and column control yield over 95 bus efficiency. The Direct RDRAM’s thirty-two banks support up to four simultaneous transactions. System oriented features for mobile, graphics and large memory systems include power management, byte masking.

The µPD488448 is offered in a CSP horizontal package suitable for desktop as well as low-profile add-in card and mobile applications. Direct RDRAMs operate from a 2.5 volt supply.

Features

• Highest sustained bandwidth per DRAM device

- 1.6 GB/s sustained data transfer rate

- Separate control and data buses for maximized efficiency

- Separate row and column control buses for easy scheduling and highest performance

- 32 banks: four transactions can take place simultaneously at full bandwidth data rates

• Low latency features

- Write buffer to reduce read latency

- 3 precharge mechanisms for controller flexibility

- Interleaved transactions

• Advanced power management:

- Multiple low power states allows flexibility in power consumption versus time to transition to active state

- Power-down self-refresh

• Overdrive current mode

• Organization: 1 Kbyte pages and 32 banks, x 16

• Uses Rambus Signaling Level (RSL) for up to 800 MHz operation

• Package : 62-pin TAPE FBGA (µBGA) and 62-pin PLASTIC FBGA (D2BGA (Die Dimension Ball Grid Array) )

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