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PCA9541APW/01集成电路(IC)专用规格书PDF中文资料
厂商型号 |
PCA9541APW/01 |
参数属性 | PCA9541APW/01 封装/外壳为16-TSSOP(0.173",4.40mm 宽);包装为管件;类别为集成电路(IC) > 专用;PCA9541APW/01应用范围:2 通道 I²C 多路复用器;产品描述:IC INTERFACE SPECIALIZED 16TSSOP |
功能描述 | 2-to-1 I2C-bus master selector with interrupt logic and reset |
文件大小 |
383.93 Kbytes |
页面数量 |
45 页 |
生产厂商 | NXP Semiconductors |
企业简称 |
nxp【恩智浦】 |
中文名称 | 恩智浦半导体公司官网 |
原厂标识 | |
数据手册 | |
更新时间 | 2024-5-21 18:30:00 |
PCA9541APW/01规格书详情
General description
The PCA9541A is a 2-to-1 I2C-bus master selector designed for high reliability dual
master I2C-bus applications where system operation is required, even when one master
fails or the controller card is removed for maintenance. The two masters (for example,
primary and back-up) are located on separate I2C-buses that connect to the same
downstream I2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are used to select one master at a time. Either master at any time can gain control of the slave devices if the other master is disabled or removed from the system. The failed master is isolated from the system and does not affect communication between the on-line master and the slave devices on the downstream I2C-bus.
Two versions are offered for different architectures. PCA9541A/01 with channel 0
selected at start-up, and PCA9541A/03 with no channel selected after start-up.
The interrupt outputs are used to provide an indication of which master has control of the bus. One interrupt input (INT_IN) collects downstream information and propagates it to the 2 upstream I2C-buses (INT0 and INT1) if enabled. INT0 and INT1 are also used to let the previous bus master know that it is not in control of the bus anymore and to indicate the completion of the bus recovery/initialization sequence. If the masking option is set, those interrupts can be disabled and do not generate an interrupt.
A bus recovery/initialization if enabled sends nine clock pulses, a not acknowledge, and a
STOP condition in order to set the downstream I2C-bus devices to an initialized state
before actually switching the channel to the selected master. An interrupt is sent to the upstream channel when the recovery/initialization procedure is completed. An internal bus sensor senses the downstream I2C-bus traffic and generates an interrupt if a channel switch occurs during a non-idle bus condition. This function is enabled when
the PCA9541A recovery/initialization is not used. The interrupt signal informs the master
that an external I2C-bus recovery/initialization must be performed. It can be disabled and an interrupt is not generated. The pass gates of the switches are constructed such that the VDD pin can be used to limit the maximum high voltage, which will be passed by the PCA9541A. This allows the use of different bus voltages on each pair, so that 1.8 V, 2.5 V, or 3.3 V devices can communicate with 5 V devices without any additional protection. The PCA9541A does not isolate the capacitive loading on either side of the device, so the designer must take into account all trace and device capacitances on both sides of the device, and pull-up resistors must be used on all channels. External pull-up resistors pull the bus to the desired voltage level for each channel. All I/O pins are 6.0 V tolerant.An active LOW reset input allows the PCA9541A to be initialized. Pulling the RESET pin LOW resets the I2C-bus state machine and configures the device to its default state as does the internal Power-On Reset (POR) function.
Features and benefits
2-to-1 bidirectional master selector
I2C-bus interface logic; compatible with SMBus standards
PCA9541A/01 powers up with Channel 0 selected
PCA9541A/03 powers up with no channel selected and either master can take control
of the bus
Active LOW interrupt input
2 active LOW interrupt outputs
Active LOW reset input
4 address pins allowing up to 16 devices on the I2C-bus
Channel selection via I2C-bus
Bus initialization/recovery function
Bus traffic sensor
Low Ron switches
Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
No glitch on power-up
Supports hot insertion
Software identical for both masters
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
6.0 V tolerant inputs
0 Hz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Packages offered: SO16, TSSOP16, HVQFN16
PCA9541APW/01属于集成电路(IC) > 专用。恩智浦半导体公司制造生产的PCA9541APW/01专用该系列产品可提供所需的功能,用以将信息源/信宿连到各种复杂或范围狭窄应用中的传感器、变送器、致动器、传输介质或其他此类端点。例如,汽车安全气囊驱动器、车身控制和信息娱乐总线、自适应电缆均衡器、智能卡等等。
产品属性
- 产品编号:
PCA9541APW/01,118
- 制造商:
NXP USA Inc.
- 类别:
集成电路(IC) > 专用
- 包装:
管件
- 应用:
2 通道 I²C 多路复用器
- 接口:
I²C,SMBus
- 电压 - 供电:
2.3V ~ 5.5V
- 封装/外壳:
16-TSSOP(0.173",4.40mm 宽)
- 供应商器件封装:
16-TSSOP
- 安装类型:
表面贴装型
- 描述:
IC INTERFACE SPECIALIZED 16TSSOP
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
NXP(恩智浦) |
23+ |
TSSOP16 |
36316 |
正规渠道,免费送样。支持账期,BOM一站式配齐 |
询价 | ||
NXP(恩智浦) |
23+ |
TSSOP16 |
25524 |
原装正品,现货库存,1小时内发货 |
询价 | ||
NXP/恩智浦 |
23+ |
NA |
5000 |
原装现货,专业配单专家 |
询价 | ||
NXP/恩智浦 |
21+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
询价 | |||
NXP/恩智浦 |
22+21+ |
TSSOP16 |
10000 |
16年电子元件现货供应商 终端BOM表可配单提供样品 |
询价 | ||
NXP/恩智浦 |
21+ |
NA |
5000 |
只做原装,一定有货,不止网上数量,量多可订货! |
询价 | ||
NXP(恩智浦) |
23+ |
NA |
6000 |
原厂原装现货订货价格优势终端BOM表可配单提供样品 |
询价 | ||
NXP/恩智浦 |
1950+ |
TSSOP16 |
6852 |
只做原装正品现货!或订货假一赔十! |
询价 | ||
NXP |
新批次 |
N/A |
4326 |
询价 | |||
NXP(恩智浦) |
2335 |
Original |
50000 |
只做原装优势现货库存,渠道可追溯 |
询价 |