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MC100E155

6-BIT2:1MUX-LATCH

Description TheMC10E/100E155containssix2:1multiplexersfollowedbytransparentlatcheswithsingle−endedoutputs.WhenbothLatchEnables(LEN1,LEN2)areLOW,thelatchistransparent,andoutputdataiscontrolledbythemultiplexerselectcontrol,SEL.AlogicHIGHoneitherLEN1orLEN2

ONSEMION Semiconductor

安森美半导体安森美半导体公司

MC100E155

5VECL6?묪it2:1Mux?묹atch

ONSEMION Semiconductor

安森美半导体安森美半导体公司

MC100E155FN

5VECL6?묪it2:1Mux?묹atch

ONSEMION Semiconductor

安森美半导体安森美半导体公司

SY100E155

6-BIT2:1MUX-LATCH

MicrelMicrel Semiconductor

麦瑞半导体

SY100E155

6-BIT2:1MUX-LATCH

DESCRIPTION TheSY10/100E155offersix2:1multiplexersfollowedbylatcheswithsingle-endedoutputs,designedforuseinnew,high-performanceECLsystems. FEATURES ■750psmax.LENtooutput ■Extended100EVEErangeof–4.2Vto–5.5V ■700psmax.Dtooutput ■Single-endedoutputs ■As

MicrelMicrel Semiconductor

麦瑞半导体

SY100E155JC

6-BIT2:1MUX-LATCH

DESCRIPTION TheSY10/100E155offersix2:1multiplexersfollowedbylatcheswithsingle-endedoutputs,designedforuseinnew,high-performanceECLsystems. FEATURES ■750psmax.LENtooutput ■Extended100EVEErangeof–4.2Vto–5.5V ■700psmax.Dtooutput ■Single-endedoutputs ■As

MicrelMicrel Semiconductor

麦瑞半导体

SY100E155JC

6-BIT2:1MUX-LATCH

MicrelMicrel Semiconductor

麦瑞半导体

SY100E155JCTR

6-BIT2:1MUX-LATCH

MicrelMicrel Semiconductor

麦瑞半导体

SY100E155JCTR

6-BIT2:1MUX-LATCH

DESCRIPTION TheSY10/100E155offersix2:1multiplexersfollowedbylatcheswithsingle-endedoutputs,designedforuseinnew,high-performanceECLsystems. FEATURES ■750psmax.LENtooutput ■Extended100EVEErangeof–4.2Vto–5.5V ■700psmax.Dtooutput ■Single-endedoutputs ■As

MicrelMicrel Semiconductor

麦瑞半导体

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