CMOS Synchronous Dynamic RAM

Description The device is CMOS Synchronous Dynamic RAM organized as 8,388,608 - word x 4 -bit x 4 - bank, 4,194,304 - word x 8 - bit x 4 - bank, or 2,097,152 - word x 16 - bit x 4 - bank. These various organizations provide wide choice for different applications. It is designed with the state-of-

文件：940.96 Kbytes 页数：69 Pages

VML

世界先进

CMOS Synchronous Dynamic RAM

Description The VG36128401B, VG36128801B and VG3664128161B are high-speed 134,217,728-bit synchronous dynamic random-access memories, organized as 8,388,608 x 4 x 4, 4,194,304 x 8 x 4 and 2,097,152 x 16 x 4 (word x bit x bank), respectively. The synchronous DRAMs achieved high-speed data transfe

文件：1.35749 Mbytes 页数：68 Pages

VML

世界先进

SOP8

Fudan

上海复旦微

上传：深圳市冠亿通科技有限公司

PLCC

VLSI

上传：深圳市昌和盛利电子有限公司