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74HCT109	文件：65.67 Kbytes Page：9 Pages	DualJKflip-flopwithsetandreset;positive-edgetrigger GENERALDESCRIPTION The74HC/HCT109arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT109aredualpositive-edgetriggered,JKflip-flopswithindividualJ,Kinputs,clock(CP)	PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦	Philips
74HCT109	文件：271.64 Kbytes Page：16 Pages	DualJKflip-flopwithsetandreset;positive-edge-trigger 1.Generaldescription The74HC109;74HCT109isadualpositiveedgetriggeredJKflip-flopfeaturingindividualJand Kinputs,clock(CP)inputs,set(SD)andreset(RD)inputsandcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyof	NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司	NEXPERIA
74HCT109D	文件：271.64 Kbytes Page：16 Pages	DualJKflip-flopwithsetandreset;positive-edge-trigger 1.Generaldescription The74HC109;74HCT109isadualpositiveedgetriggeredJKflip-flopfeaturingindividualJand Kinputs,clock(CP)inputs,set(SD)andreset(RD)inputsandcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyof	NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司	NEXPERIA
74HCT109D	文件：65.67 Kbytes Page：9 Pages	DualJKflip-flopwithsetandreset;positive-edgetrigger GENERALDESCRIPTION The74HC/HCT109arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT109aredualpositive-edgetriggered,JKflip-flopswithindividualJ,Kinputs,clock(CP)	PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦	Philips
74HCT109DB	文件：65.67 Kbytes Page：9 Pages	DualJKflip-flopwithsetandreset;positive-edgetrigger GENERALDESCRIPTION The74HC/HCT109arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT109aredualpositive-edgetriggered,JKflip-flopswithindividualJ,Kinputs,clock(CP)	PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦	Philips
74HCT109N	文件：65.67 Kbytes Page：9 Pages	DualJKflip-flopwithsetandreset;positive-edgetrigger GENERALDESCRIPTION The74HC/HCT109arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT109aredualpositive-edgetriggered,JKflip-flopswithindividualJ,Kinputs,clock(CP)	PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦	Philips
74HCT109PW	文件：65.67 Kbytes Page：9 Pages	DualJKflip-flopwithsetandreset;positive-edgetrigger GENERALDESCRIPTION The74HC/HCT109arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT109aredualpositive-edgetriggered,JKflip-flopswithindividualJ,Kinputs,clock(CP)	PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦	Philips
74HCT109PW	文件：271.64 Kbytes Page：16 Pages	DualJKflip-flopwithsetandreset;positive-edge-trigger 1.Generaldescription The74HC109;74HCT109isadualpositiveedgetriggeredJKflip-flopfeaturingindividualJand Kinputs,clock(CP)inputs,set(SD)andreset(RD)inputsandcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyof	NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司	NEXPERIA
CD74HCT109	文件：367.45 Kbytes Page：16 Pages	DualJ-KFlip-FlopwithSetandResetPositive-EdgeTrigger Features •AsynchronousSetandReset •SchmittTriggerClockInputs •TypicalfMAX=54MHzatVCC=5V,CL=15pF, TA=25oC •Fanout(OverTemperatureRange) -StandardOutputs...............10LSTTLLoads -BusDriverOutputs.............15LSTTLLoads •Wi	TI2Texas Instruments 德州仪器美国德州仪器公司	TI2
CD74HCT109	文件：454.62 Kbytes Page：15 Pages	DualJ-KFlip-FlopwithSetandResetPositive-EdgeTrigger	TITexas Instruments 德州仪器美国德州仪器公司	TI

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