Table of Contents

Features The Tsi721 supports the following features. PCIe Features • PCIe 2.1 standard compliant • 5/2.5 Gbaud link speed • x4/x2/x1 link width • 128- and 256-byte maximum payload • Advanced error reporting • Internal error reporting • Lane reversal • Automatic polarity inversion • Dyna

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This document uses the following conventions

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IDT

RapidIO Bridge

The Tsi721 converts from PCIe to RapidIO and vice versa and provides full line rate bridging at 20 Gbaud. Using the Tsi721 designers can develop heterogeneous systems that leverage the peer to peer networking performance of RapidIO while at the same time using multiprocessor clusters that may only b x4 PCIe V2.1 to x4 S-RIO V2.1\nSingle port: x4, x2 or x1 support\n1.25, 2.5, 3.125 and 5 Gbaud support\nMultiple DMA and Messaging channels/engines each capable of supporting full 20 Gbaud I/O\n8Kbyte packet buffering per DMA and Messaging Channel\n20 Baud line rate performance for 64 byte or larger;

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Package：143-BGA，FCBGA；包装：托盘 类别：集成电路（IC） 专用 描述：IC INTFACE SPECIALIZED 143FCBGA

Renesas Electronics America Inc

Package：143-BGA，FCBGA；包装：托盘 类别：集成电路（IC） 专用 描述：IC INTFACE SPECIALIZED 143FCBGA

Renesas Electronics America Inc

Package：143-BGA，FCBGA；包装：托盘 类别：集成电路（IC） 专用 描述：IC INTFACE SPECIALIZED 143FCBGA

Renesas Electronics America Inc