TM57PA28

8 bit MCU; 1. ROM: 2K x 14 bits OTP \n2. RAM: 176 x 8 bits\n3. STACK: 5 Levels\n4. System Oscillation Sources\n . Fast-clock: FIRC (Fast Internal RC): 1 / 2 / 4 / 8 MHz\n . Slow-clock: SIRC (Slow Internal RC): 110KHz@5V; 88KHz@3V\n5. System Clock Prescaler: System Oscillation Sources can be divided by 16/4/2/1 as System Clock (Fsys)\n6. Power Saving Operation Modes\n . FAST Mode: Slow-clock can be disabled or enabled. \n . SLOW Mode: Fast-clock stops, Slow-clock keeps CPU running\n . IDLE Mode: Fast-clock and CPU stop. T2 keeps running\n . STOP Mode: All Clocks stop, T2 stops\n7. Dual System Clock\n . FIRC + SIRC\n8. 3 Independent Timers\n . Timer0\n - 8-bit timer divided by 1 ~ 256 pre-scales option, Counter / Interrupt / Stop function\n - Overflow and Toggle out\n . Timer1\n - 8-bit timer with two pre-scalers options, Counter / Interrupt / Stop / Reload function\n - Overflow and Toggle out\n . T2\n - 15-bit timer with 4 interrupt interval time options\n - IDLE mode wake-up timer or used as one simple 15-bit time base\n - Clock source: SIRC, Fsys/128\n9. PWM\n - (8+2) bits PWMA, with duty-adjustable / period-adjustment / buffer-reload\n - Clock Source (PWMACLK): Fsys / 16 MHz / 32 MHz\n - Complementary PWM output (PWMAP, PWMAN)\n - Non-overlap time durations adjustable: (0~10)*(1/fPWMACLK)\n - PWMAP / PWMAN are high drive / sink pins\n10. Touch Key: 7 channels\n11. ADC\n . 12-bit ADC with 11 channels and 1 internal reference voltage(VBG, 1.25±1%) on 11th channel\n . ADC's AVREF power source can from internal LDO 2.5V or external AVREF pin\n . ADC input channel voltage swing range is 0~AVREF.\n12. Built-in LDO 2.5V±1% output to LDOC pin and also supply to ADC’s AVREF.\n13. Over Current Protection (OCP)\n14. Over Voltage Protection (OVP)\n15. Interrupt\n . Three External Interrupt pins\n - 1 pin (PA7/INT2) is falling edge wake-up triggered & interrupts\n - 2 pins (PA6/INT0, PA1/INT1) are rising or falling edge wake-up triggered & interrupt \n . Timer0 / Timer1 / T2 / OCP / OVP interrupts\n16. PD1, PB1, PB0 individual pin low level wake up\n17. Reset Sources\n . Power On Reset \n . Watchdog Reset \n . Low Voltage Reset \n . External pin Reset\n18. Low Voltage Reset Option: 2.2V / 3.1V / 2.2V, disable in STOP mode / Disable\n19. Operation Voltage: Low Voltage Reset Level to 5.5V\n . Fsys = 4 MHz, 2.0V ~ 5.5V\n . Fsys = 8 MHz, 2.4V ~ 5.5V\n20. Operating Temperature Range: -40℃ to +85℃\n21. Interrupts\n . Three External Interrupt Pins\n - Two pins are falling edge triggered\n - One pin is rising or falling edge triggered\n . Timer0 / T2 / Comparator Interrupts\n22. Watchdog Timer (WDT)\n . Clocked by built-in RC oscillator with 4 adjustable reset time options\n 140 ms / 280 ms / 1100 ms / 2280 ms @ VDD = 5V \n . Watchdog timer can be disabled/enabled in STOP/IDLE mode\n23. Table Read Instruction: 14-bit ROM data lookup table\n24. Instruction Set: 39 Instructions\n25. Instruction Execution Time: 2 oscillation clocks per instruction except branch\n26. I/O Port Modes\n . Pseudo-Open-Drain Output (PA2 ~ PA0)\n . Open-Drain Output\n . CMOS Push-Pull Output\n . Schmitt Trigger Input with pull-up resistor option\n27. I/O Ports: Three bit-programmable I/O ports (Max. 18 pins)\n28. Package Types:\n . 20-pin SSOP (209 mil)\n . 20-pin DIP (300 mil)\n . 20-pin SOP (300 mil)\n . 16-pin DIP (300 mil)\n . 16-pin SOP (150 mil)\n29. Supported EV board on ICE\n EV board: EV2767\n\n;

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