I2C-bus controlled BTSC stereo/SAP decoder and audio processor

文件：258.61 Kbytes 页数：40 Pages

PHI

飞利浦

I2C-bus controlled BTSC stereo/SAP decoder and audio processor

GENERAL DESCRIPTION\nThe TDA9852 is a bipolar-integrated BTSC stereo decoder with hi-fi audio processor (I2C-bus controlled) for application in TV sets, VCRs and multimedia.FEATURES\n• Quasi alignment-free application due to automatic adjustment of channel separation via I2C-bus\n• High integration • Quasi alignment-free application due to automatic adjustment of channel separation via I2C-bus\n• High integration level with automatically tuned integrated filters\n• Input level adjustment I2C-bus controlled\n• Alignment-free SAP processing\n• dbx noise reduction circuit\n• Power supply\n• I2C-b;

恩XP

恩智浦

I2C-bus controlled BTSC stereo/SAP decoder and audio processor

文件：258.61 Kbytes 页数：40 Pages

PHI

飞利浦

Arm짰 Cortex짰-M0 Microcontroller with LIN and H-Bridge NFET

文件：3.7761 Mbytes 页数：146 Pages

Infineon

英飞凌