TC74AC573P中文资料东芝数据手册PDF规格书

Octal D-Type Latch with 3-State Output

The TC74AC573 is an advanced high speed CMOS OCTAL LATCH fabricated with silicon gate and double-layer metal wiring C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

These 8-bit D-type latches are controlled by a latch enable input (LE) and a output enable input ( OE ).

When the OE input is high, the eight outputs are in a high impedance state.

All inputs are equipped with protection circuits against static discharge or transient excess voltage.

Features

• High speed: tpd = 6.0 ns (typ.) at VCC = 5 V

• Low power dissipation: ICC = 8 μA (max) at Ta = 25°C

• High noise immunity: VNIH = VNIL = 28 VCC (min)

• Symmetrical output impedance: |IOH| = IOL = 24 mA (min)

Capability of driving 50 Ω

transmission lines.

• Balanced propagation delays: tpLH ∼ − tpHL

• Wide operating voltage range: VCC (opr) = 2 to 5.5 V

• Pin and function compatible with 74F573