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TAMC532-SW-25中文资料TEWS数据手册PDF规格书

TAMC532-SW-25
厂商型号

TAMC532-SW-25

功能描述

32 x 12/14 Bit 50/75 Msps ADC for MTCA.4 Rear-I/O

文件大小

466.9 Kbytes

页面数量

3

生产厂商 TEWS Technologies GmbH
企业简称

TEWS

中文名称

TEWS Technologies GmbH官网

原厂标识
数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-6-11 10:49:00

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TAMC532-SW-25规格书详情

Application Information

The TAMC532 is an Advanced Mezzanine Card (AMC) according to MTCA.4 (MicroTCA Enhancements for Rear I/O and Precision Timing). 32 analog input channels allow sampling of analog signals with 75 Msps at 12 Bit resolution (optional 50 Msps at 14 Bit).

The TAMC532 utilizes Back-IO via Zone 3 to interface the ADCs with the signal conditioning located on the μRTM. This modular concept allows adapting the TAMC532 to nearly any analog input requirement without changing the AMC itself.

A very powerful on-board clocking structure enables using the TAMC532 in nearly all kind of clocking scenarios. A self-clocked application as well as synchronizing multiple TAMC532 is possible, allowing applications with up to several hundred simultaneous sampled channels.

Data readout can be done via several interfaces like e.g. PCI-Express or two SFP-cages in the front panel.

The on-board DRR3 memory can be used for data buffering in triggered applications that require subsequent readout. Assuming sufficient data fabric bandwidth, the DDR3 memory can also be used as double buffer, allowing infinite data acquisition.

Up to eight backplane triggers are available, each configurable as input or output.

The TAMC532 is equipped with a powerful Kintex-7 FPGA for data preprocessing and transfer. By default, the Kintex-7 FPGA is configured with a firmware that provides a very functional readout system and full control over the numerous clocking and trigger options. It can also be adapted to customer needs if necessary.

In-circuit programming and debugging of the FPGA design (e.g. using Xilinx “ChipScope”) is supported. The Program and Debug Box TA900 or the standard Xilinx JTAG header allows access to the module while it is inserted in a system. In addition to the module's JTAG Chain, the TA900 allows access to the UART of the on-board Module Management Controller (MMC) and to two user pins of the FPGA. If a UART core is implemented in the FPGA, serial communication via the TA900 is possible.

The TA900 can be accessed by USB 2.0 and by a 14-pin JTAG Header (e.g. for connecting a Xilinx Platform Cable).

供应商 型号 品牌 批号 封装 库存 备注 价格
NINI
23+
放大器
2519
原厂原装正品
询价
MINI
2021+
3000
十年专营原装现货,假一赔十
询价
LGINN
ROHS
56520
一级代理 原装正品假一罚十价格优势长期供货
询价
24+
N/A
75000
一级代理-主营优势-实惠价格-不悔选择
询价
NINI
24+
SMD
2336
进口原装正品优势供应
询价
帮定IC
24+
SMD
2679
原装优势!绝对公司现货!可长期供货!
询价
NEW IN ORIGINAL
2022
SOT-23
9200
全新原装现货热卖
询价
Mini-circuits
2324+
SMA
78920
二十余载金牌老企,研究所优秀合供单位,您的原厂窗口
询价
Mini-circuits
1000
询价
NEWINORIGINAL
24+
SOT-23
9200
新进库存/原装
询价