SY56572XR中文资料Multiplexers数据手册Microchip规格书

描述 Description

The SY100S370 is a universal demultiplexer/decoder that can be used as either a dual 1-of-4 decoder or as a single 1-of-8 decoder and is designed for use in high-performance ECL systems. The Mode control (M) input determines the function. In the dual 1-of-4 mode, each 4-input group has a pair of active-LOW Enable (E) inputs. The Enable pins are assigned such that in the single 1-of-8 mode they can be tied together in pairs to result in two active-LOW Enable inputs. E1a will be tied to E1b and E2a to E2b.The auxiliary inputs (Hn) are used to determine whether the outputs are active-HIGH or active-LOW. The address inputs for the dual 1-of-4 mode are A0a, A1a, A0b. A2a is unused. In the 1-of-8 mode, the address inputs are A0a, A1a, A2a. The inputs on the device have 75KΩ pull-down resistors.

特性 Features

•Max. propagation delay of 1200ps
•IEE min. of -92mA
•Industry standard 100K ECL levels
•Extended supply voltage option:
•VEE = -4.2V to -5.5V
•Voltage and temperature compensation for improved noise immunity
•Internal 75KΩ input pull-down resistors
•60% faster than National or Signetics
•Approximately 40% lower power than National or Signetics
•Function and pinout compatible with National and Signetics F100K
•Available in 28-pin PLCC package

简介

SY56572XR属于集成电路（IC）的时钟缓冲器驱动器。由Microchip制造生产的SY56572XR时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。