SY10E151JCTR数据表ic资料行情报价Micrel-114ic电子网

型号	下载订购	功能描述	制造商上传企业	LOGO
SY10E151JCTR	文件：66.31 Kbytes Page：4 Pages	6-BIT D REGISTER DESCRIPTION The SY10/100E151 offer 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new, high-performance ECL systems. The two external clock signals (CLK1, CLK2) are gated through a logical OR operation before use as clocking control for 文件：66.31 Kbytes 页数：4 Pages	Micrel 麦瑞半导体	Micrel
SY10E151JCTR	文件：64.129 Kbytes Page：4 Pages	6-BIT D REGISTER 文件：64.129 Kbytes 页数：4 Pages	Micrel 麦瑞半导体	Micrel
SY10E151JI	文件：63.16 Kbytes Page：4 Pages	6-BIT D REGISTER 文件：63.16 Kbytes 页数：4 Pages	Micrel 麦瑞半导体	Micrel
SY10E151JI	文件：66.31 Kbytes Page：4 Pages	6-BIT D REGISTER DESCRIPTION The SY10/100E151 offer 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new, high-performance ECL systems. The two external clock signals (CLK1, CLK2) are gated through a logical OR operation before use as clocking control for 文件：66.31 Kbytes 页数：4 Pages	Micrel 麦瑞半导体	Micrel
SY10E151JI	文件：64.129 Kbytes Page：4 Pages	6-BIT D REGISTER 文件：64.129 Kbytes 页数：4 Pages	Micrel 麦瑞半导体	Micrel

更多SY10E151JCTR供应商更新时间2025-10-6 10:30:00