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SSTUB32868

1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications

文件:264.68 Kbytes 页数:30 Pages

恩XP

恩XP

SSTUB32868

1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications

恩XP

恩XP

SSTUB32868ET

1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications

Overview Archived content is no longer updated and is made available for historical reference only.\n The SSTUB32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four (2R × 4) and similar high-density Double Data Rate 2 (DDR2) memory modules. It is similar in functio \n•28-bit data register supporting DDR2\n•Supports 2 rank by 4 DIMM density by integrating equivalent functionality of two JEDEC-standard DDR2 registers (that is, 2 × SSTUA32864 or 2 × SSTUA32866)\n•Parity checking function across 22 input data bits\n•Parity out signal\n•Controlled multi-impedance o;

恩XP

恩XP

ICSSSTUAF32868A

28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2

Description This 28-bit 1:2 configurable registered buffer is designed for 1.7V to 1.9V VDD operation. All inputs are compatible with the JEDEC standard for SSTL_18, except the chip-select gate-enable (CSGEN), control (C), and reset (RESET) inputs, which are LVCMOS. All outputs are edge-controlle

文件:538.99 Kbytes 页数:22 Pages

IDT

ICSSSTUAF32868A

28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 CONFIDENTIAL

Features • 28-bit 1:2 registered buffer with parity check functionality • Supports SSTL_18 JEDEC specification on data inputs and outputs • Supports LVCMOS switching levels on CSGEN and RESET inputs • Low voltage operation: VDD = 1.7V to 1.9V • Available in 176-ball LFBGA package

文件:686.88 Kbytes 页数:22 Pages

RENESAS

瑞萨

ICSSSTUAF32868AHLFT

28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2

Description This 28-bit 1:2 configurable registered buffer is designed for 1.7V to 1.9V VDD operation. All inputs are compatible with the JEDEC standard for SSTL_18, except the chip-select gate-enable (CSGEN), control (C), and reset (RESET) inputs, which are LVCMOS. All outputs are edge-controlle

文件:538.99 Kbytes 页数:22 Pages

IDT

供应商型号品牌批号封装库存备注价格
恩XP
25+
3000
百分百原装正品 真实公司现货库存 本公司只做原装 可
询价
恩XP
24+
176-TFBGA(6x15)
56200
一级代理/放心采购
询价
恩XP
25+
BGA-176
1001
就找我吧!--邀您体验愉快问购元件!
询价
恩XP
23+
LFBGA96
50000
全新原装正品现货,支持订货
询价
恩XP
22+
NA
45000
加我QQ或微信咨询更多详细信息,
询价
PHILIS
21+
LFBGA96
10000
原装现货假一罚十
询价
恩XP
22+
176TFBGA (6x15)
9000
原厂渠道,现货配单
询价
恩XP
24+
NA/
3000
优势代理渠道,原装正品,可全系列订货开增值税票
询价
恩XP
23+
176TFBGA (6x15)
8000
只做原装现货
询价
恩XP
23+
LFBGA96
2500
百分百进口原装环保整盘
询价
更多SSTUB32868供应商 更新时间2025-12-2 8:22:00