SN74LVTH541DWR集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

SN74LVTH541DWR属于集成电路（IC）的缓冲器驱动器接收器收发器。由德州仪器制造生产的SN74LVTH541DWR缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

Support Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V VCC)

Typical VOLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

Support Unregulated Battery Operation

Down to 2.7 V

Ioff and Power-Up 3-State Support Hot

Insertion

Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

Latch-Up Performance Exceeds 500 mA Per

JESD 17

ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

description/ordering information

These octal buffers/drivers are designed

specifically for low-voltage (3.3-V) VCC operation,

but with the capability to provide a TTL interface

to a 5-V system environment.

The ’LVTH541 devices are ideal for driving bus

lines or buffer-memory address registers. These

devices feature inputs and outputs on opposite

sides of the package that facilitate printed circuit

board layout.

The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1 or OE2)

input is high, all outputs are in the high-impedance state.