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SN74ALVCH16841DGGR.B中文资料德州仪器数据手册PDF规格书

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厂商型号

SN74ALVCH16841DGGR.B

功能描述

20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

丝印标识

ALVCH16841

封装外壳

TSSOP

文件大小

589.24 Kbytes

页面数量

19

生产厂商

TI

中文名称

德州仪器

网址

网址

数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-11-14 23:00:00

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SN74ALVCH16841DGGR.B规格书详情

FEATURES

· Member of the Texas Instruments Widebus™

Family

· EPIC™ (Enhanced-Performance Implanted

CMOS) Submicron Process

· ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

· Latch-Up Performance Exceeds 250 mA Per

JESD 17

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Package Options Include Plastic 300-mil

Shrink Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages

DESCRIPTION

This 20-bit bus-interface D-type latch is designed for

1.65-V to 3.6-V VCC operation.

The SN74ALVCH16841 features 3-state outputs

designed specifically for driving highly capacitive or

relatively low-impedance loads. This device is

particularly suitable for implementing buffer registers,

unidirectional bus drivers, and working registers.

The SN74ALVCH16841 can be used as two 10-bit

latches or one 20-bit latch. The 20 latches are

transparent D-type latches. The device has

noninverting data (D) inputs and provides true data at

its outputs. While the latch-enable (1LE or 2LE) input

is high, the Q outputs of the corresponding 10-bit

latch follow the D inputs. When LE is taken low, the Q

outputs are latched at the levels set up at the D

inputs.

A buffered output-enable (1OE or 2OE) input can be used to place the outputs of the corresponding 10-bit latch

in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state,

the outputs neither load nor drive the bus lines significantly.

OE does not affect the internal operation of the latches. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16841 is characterized for operation from -40°C to 85°C.

供应商 型号 品牌 批号 封装 库存 备注 价格
TI(德州仪器)
24+
SSOP56300mil
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
询价
TI(德州仪器)
24+
SSOP56300mil
1490
原装现货,免费供样,技术支持,原厂对接
询价
TI
20+
NA
53650
TI原装主营-可开原型号增税票
询价
TI
25+
SSOP56
4690
百分百原装正品 真实公司现货库存 本公司只做原装 可
询价
IDT
25+23+
SSOP
37741
绝对原装正品全新进口深圳现货
询价
TI
25+
SSOP56
4500
全新原装、诚信经营、公司现货销售!
询价
TI
22+
56SSOP
9000
原厂渠道,现货配单
询价
TexasInstruments
18+
ICTRANSCVRTRI-ST18BIT56T
6800
公司原装现货/欢迎来电咨询!
询价
TI
24+
SSOP56
124
询价
TI/德州仪器
24+
SSOP-56
9600
原装现货,优势供应,支持实单!
询价