SN74ALVCH162601DLR集成电路（IC）的通用总线功能规格书PDF中文资料

SN74ALVCH162601DLR属于集成电路（IC）的通用总线功能。由德州仪器制造生产的SN74ALVCH162601DLR通用总线功能通用总线功能系列产品是元件级产品，用于处理或操作一系列（通常为 8 个或更多）并行逻辑信号（称为总线）。所执行的功能包括临时存储要发送或接收的数据，执行缓冲以允许输出电流容量有限的器件（例如微处理器）通过远距离互连高速传输数据，以及调换或移动总线内的位顺序等。

FEATURES

· Member of the Texas Instruments Widebus™

Family

· EPIC™ (Enhanced-Performance Implanted

CMOS) Submicron Process

· UBT™ (Universal Bus Transceiver) Combines

D-Type Latches and D-Type Flip-Flops for

Operation in Transparent, Latched, Clocked,

or Clock-Enabled Modes

· B-Port Outputs Have Equivalent 26-W Series

Resistors, So No External Resistors Are

Required

· ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

· Latch-Up Performance Exceeds 250 mA Per

JESD 17

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Package Options Include Plastic 300-mil

Shrink Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages

DESCRIPTION

This 18-bit universal bus transceiver is designed for

1.65-V to 3.6-V VCC operation.

The SN74ALVCH162601 combines D-type latches

and D-type flip-flops to allow data flow in transparent,

latched, clocked, and clock-enabled modes.

Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),

and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB and

CLKENBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When

LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is

stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB is low, the outputs are active.

When OEAB is high, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, CLKBA, and CLKENBA.

The B-port outputs include equivalent 26-W series resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH162601 is characterized for operation from -40°C to 85°C.