SN74ABT8245DWG4集成电路（IC）的专用逻辑器件规格书PDF中文资料

SN74ABT8245DWG4属于集成电路（IC）的专用逻辑器件。由德州仪器制造生产的SN74ABT8245DWG4专用逻辑器件专用逻辑 IC 设计提供应用特定的逻辑输出类型，例如 BCD 速率倍增、可寻址扫描端口、总线终端阵列、CML 驱动器、比较器、ABT 扫描测试、二进制全加法器、互补对加逆变器、可配置缓冲器、触点颤动消除器、晶体振荡器、延迟元件、差分接收器、LVTTL 到 GTLP 收发器、存储器解码器、电源良好检测器和分频器。

Members of the Texas Instruments

SCOPE E Family of Testability Products

Compatible With the IEEE Standard

1149.1-1990 (JTAG) Test Access Port

and Boundary-Scan Architecture

Functionally Equivalent to ’F245 and

’ABT245 in the Normal-Function Mode

SCOPE E Instruction Set:

– IEEE Standard 1149.1-1990 Required

Instructions, Optional INTEST, CLAMP,

and HIGHZ

– Parallel-Signature Analysis at Inputs

With Masking Option

– Pseudo-Random Pattern Generation

From Outputs

– Sample Inputs/Toggle Outputs

– Binary Count From Outputs

– Even-Parity Opcodes

Two Boundary-Scan Cells per I/O for

Greater Flexibility

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

Package Options Include Plastic

Small-Outline Packages (DW), Ceramic

Chip Carriers(FK), and Standard Ceramic

DIPs (JT)

description

The ’ABT8245 scan test devices with octal bus

transceivers are members of the Texas Instruments

SCOPEE testability integrated-circuit

family. This family of devices supports IEEE

Standard 1149.1-1990 boundary scan to facilitate

testing of complex circuit-board assemblies. Scan

access to the test circuitry is accomplished via the

4-wire test access port (TAP) interface.

In the normal mode, these devices are functionally equivalent to the ’F245 and ’ABT245 octal bus transceivers.

The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins

or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect the

functional operation of the SCOPEE octal bus transceivers.

Data flow is controlled by the direction-control (DIR) and output-enable (OE) inputs. Data transmission is

allowed from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at DIR. The

output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.