SN65LV1023A-EP中文资料德州仪器数据手册PDF规格书

FEATURES

· Controlled Baseline

– One Assembly/Test Site, One Fabrication

Site

· Extended Temperature Performance of –55°C

to 125°C

· Enhanced Diminishing Manufacturing

Sources (DMS) Support

· Enhanced Product-Change Notification

· Qualification Pedigree (1)

(1) Component qualification in accordance with JEDEC and

industry standards to ensure reliable operation over an

extended temperature range. This includes, but is not limited

to, Highly Accelerated Stress Test (HAST) or biased 85/85,

temperature cycle, autoclave or unbiased HAST,

electromigration, bond intermetallic life, and mold compound

life. Such qualification testing should not be viewed as

justifying use of this component beyond specified

performance and environmental limits.

· 100-Mbps to 660-Mbps Serial LVDS Data

Payload Bandwidth at 10-MHz to 66-MHz

System Clock

· Pin-Compatible Superset of

DS92LV1023/DS92LV1224

· Chipset (Serializer/Deserializer) Power

Consumption <450 mW (Typ) at 66 MHz

· Synchronization Mode for Faster Lock

· Lock Indicator

· No External Components Required for PLL

· 28-Pin SSOP and Space Saving 5 ´ 5 mm

QFN Packages Available

· Programmable Edge Trigger on Clock

· Flow-Through Pinout for Easy PCB Layout

DESCRIPTION

The SN65LV1023A serializer and SN65LV1224B deserializer comprise a 10-bit serdes chipset designed to

transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 10 MHz

to 66 MHz. Including overhead, this translates into a serial data rate between 120-Mbps and 792-Mbps payload

encoded throughput.

Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC

patterns or the deserializer can be allowed to synchronize to random data. By using the synchronization mode,

the deserializer establishes lock within specified, shorter time parameters.

The device can be entered into a power-down state when no data transfer is required. Alternatively, a mode is

available to place the output pins in the high-impedance state without losing PLL lock.

The SN65LV1023A and SN65LV1224B are characterized for operation over ambient air temperature of –55°C to

125°C.