SN54LS73A数据手册TI中文资料规格书
SN54LS73A规格书详情
描述 Description
The '73, and 'H73, contain two independent J-K flip-flops with individual J-K, clock, and direct clear inputs. The '73, and 'H73, are positive pulse-triggered flip-flops. J-K input is loaded into the master while the clock is high and transferred to the slave on the high-to-low transition. For these devices the J and K inputs must be stable while the clock is high. The 'LS73A contains two independent negative-edge-triggered flip-flops. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. When the clear is low, it overrides the clock and data inputs forcing the Q output low and the Q\\ output high. The SN5473, SN54H73, and the SN54LS73A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7473, and the SN74LS73A are characterized for operation from 0°C to 70°C.
特性 Features
• Package Options Include Plastic “Small Outline\" Packages, Flat Packages, and Plastic and Ceramic DIPs
• Dependable Texas Instruments Quality and Reliability
技术参数
- 制造商编号
:SN54LS73A
- 生产厂家
:TI
- Technology Family
:LS
- Supply voltage (Min) (V)
:4.75
- Supply voltage (Max) (V)
:5.25
- Input type
:TTL
- Output type
:Push-Pull
- Clock Frequency (MHz)
:30
- ICC (Max) (uA)
:6000
- IOL (Max) (mA)
:-0.4
- IOH (Max) (mA)
:8
- Features
:Negative edge triggered
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
MOTOROLA |
1725+ |
CDIP14 |
3256 |
科恒伟业!只做原装正品,假一赔十! |
询价 | ||
TI |
23+ |
CDIP/16 |
7000 |
绝对全新原装!100%保质量特价!请放心订购! |
询价 | ||
TI |
9929 |
49 |
公司优势库存 热卖中! |
询价 | |||
最新 |
2000 |
原装正品现货 |
询价 | ||||
TI |
24+ |
CDIP|14 |
70230 |
免费送样原盒原包现货一手渠道联系 |
询价 | ||
TI |
0735+ |
DIP |
3300 |
全新原装现货绝对自己公司特价库 |
询价 | ||
TI |
18+ |
CDIP14 |
85600 |
保证进口原装可开17%增值税发票 |
询价 | ||
TI |
25+ |
DIP |
4500 |
全新原装、诚信经营、公司现货销售! |
询价 | ||
MOT |
DIP16 |
68500 |
一级代理 原装正品假一罚十价格优势长期供货 |
询价 | |||
TI/TEXAS |
23+ |
原厂封装 |
8931 |
询价 |