SN54ABTH25245中文资料德州仪器数据手册PDF规格书

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

High-Impedance State During Power Up

and Power Down

Designed to Facilitate Incident-Wave

Switching for Line Impedances of 25 W or

Greater

Distributed VCC and GND Pin Configuration

Minimizes High-Speed Switching Noise

Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

Package Options Include Plastic

Small-Outline (DW) Package, Ceramic Chip

Carriers (FK), and Standard Plastic (NT)

and Ceramic (JT) DIPs

description

The ’ABTH25245 are 25-W octal bus transceivers

designed for asynchronous communication

between data buses. They improve both the

performance and density of 3-state memory

address drivers, clock drivers, and bus-oriented

transceivers.

These devices allow noninverted data

transmission from the A bus to the B bus or from

the B bus to the A bus, depending on the logic level

at the direction-control (DIR) input. The

output-enable (OE) input can disable the device

so that both buses are effectively isolated. When

OE is low, the device is active.

These transceivers are capable of sinking 188 mA of IOL current, which facilitates switching 25-W transmission

lines on the incident wave. The distributed VCC and GND pins minimize switching noise for more-reliable system

operation.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level