Dual J-K Flip-Flop with Set and Reset

The SL74HC112 is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs. ● Outputs Directly

文件：49.05 Kbytes 页数：6 Pages

SLS

Dual J-K Flip-Flop with Set and Reset

SLS

Dual J-K Flip-Flop with Set and Reset

The SL74HC112 is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs. ● Outputs Directly

文件：49.05 Kbytes 页数：6 Pages

SLS

Dual J-K Flip-Flop with Set and Reset

The SL74HC112 is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs. ● Outputs Directly

文件：49.05 Kbytes 页数：6 Pages

SLS

Dual J-K Negative-Edge-Triggered Flip-Flop

Dual J-K Negative-Edge-Triggered Flip-Flop

SLS