Features

 Generates any frequency from 1 to

200 MHz on each of the 4 output banks

 Eight CMOS clock outputs

 Guaranteed 0 ppm frequency synthesis

error for any combination of frequencies

 25 or 27 MHz xtal or 5–200 MHz input clk

 Five programmable control pins (output

enable, frequency select, reset)

 Separate OEB pins to disable individual

banks or all outputs

 Loss of signal output

 Low 50 ps (typ) pk-pk period jitter

 Phase jitter: 2 ps rms 12 kHz–20 MHz

 Excellent PSRR performance

eliminates need for external power

supply filtering

 Low power: 45 mA (core)

 Core VDD: 1.8, 2.5, or 3.3 V

 Separate VDDO for each bank of

outputs: 1.8, 2.5, or 3.3 V

 Small size: 4x4 mm 24-QFN

 Industrial temperature range:

–40 to +85 °C

 Custom versions available using

ClockBuilder™ web utility

 Samples available in 2 weeks

SI5355属于集成电路（IC） > 时钟发生器，PLL，频率合成器。美国思佳讯公司制造生产的SI5355时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。