Features

 Fifteen 0.7 V low-power, pushpull

HCSL PCIe Gen3 outputs

 100 MHz /133 MHz PLL

operation, supports PCIe and

QPI

 PLL bandwidth SW SMBUS

programming overrides the latch

value from HW pin

 9 selectable SMBUS addresses

 SMBus address configurable to

allow multiple buffers in a single

control network 3.3 V supply

voltage operation

 Separate VDDIO for outputs

 PLL or bypass mode

 Spread spectrum tolerable

 1.05 to 3.3 V I/O supply voltage

 50 ps output-to-output skew

 50 ps cyc-cyc jitter (PLL mode)

 Low phase jitter (Intel QPI, PCIe

Gen 1/2/3/4 common clock

compliant)

 Gen 3 SRNS Compliant

 100 ps input-to-output delay

 Extended Temperature:

–40 to 85 °C

 64-pin QFN

SI53115-A01AGM属于集成电路（IC） > 应用特定时钟/定时。美国思佳讯公司制造生产的SI53115-A01AGM应用特定时钟/定时专用时钟和计时 IC（集成电路）产品族中的产品主要用于执行与时间或频率信息生成和分配相关的各种操作，适合的设计环境较特定，例如 AMD 和 Intel 的中央处理单元 (CPU) 或图形处理单元 (GPU)、DVD 音频设备、蓝光光盘播放器、以太网设备、PCIe、SATA、光纤通道接口、车载娱乐总线等。