PCA9525中文资料恩XP数据手册PDF规格书

General description

The PCA9525 is a monolithic CMOS integrated circuit for bus buffering in applications including I2C-bus, SMBus, DDC, PMBus,and other systems based on similar principles.

The buffer extends the bus load limit by buffering both the SCL and SDA lines, allowing the maximum permissible bus capacitance on both sides of the buffer.

The PCA9525 includes a unidirectional buffer for the clock signal, and a bidirectional buffer for the data signal. Slave devices which employ clock stretching are therefore not supported.

Features and benefits

Simple impedance isolating buffer for 2-wire buses

4 mA maximum static open-drain pull-down capability supports a wide range of bus standards

Works with I2C-bus (Standard-mode, Fast-mode), SMBus (standard and high power mode), and PMBus

Fast switching times allow operation in excess of 1 MHz

Enable allows bus segments to be disconnected

Hysteresis on inputs provides noise immunity

Operating voltages from 2.7 V to 5.5 V

Very low supply current

Uncomplicated characteristics suitable for quick implementation in most common 2-wire bus applications

Applications

Electronic signs and displays

Game consoles/boxes

Gaming machine networks

TV/projector/monitor interconnection (DDC)

Power management systems

Desktop and portable computers

Security systems