Bus interface registers

DESCRIPTION The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity. FEATURES • High speed parallel registers with positive edge-triggered D-t

文件：140.22 Kbytes 页数：18 Pages

PHI

飞利浦

Bus interface registers

恩XP

恩智浦

Bus interface registers

DESCRIPTION The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity. FEATURES • High speed parallel registers with positive edge-triggered D-t

文件：140.22 Kbytes 页数：18 Pages

PHI

飞利浦

10-Bit D-Type Flip-Flop

文件：153.72 Kbytes 页数：8 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

10-Bit D-Type Flip-Flop

General Description The 74F821 is a 10-bit D-type flip-flop with 3-STATE true outputs arranged in a broadside pinout. Features ■ 3-STATE Outputs

文件：49.82 Kbytes 页数：6 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Bus interface registers

DESCRIPTION The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity. FEATURES • High speed parallel registers with positive edge-triggered D-t

文件：140.22 Kbytes 页数：18 Pages

PHI

飞利浦