PowerQUICC II Pro Processor

Overview The MPC8309 incorporates the e300c3 (MPC603e-based) core built on Power Architecture® technology, which includes 16 KB of each L1 instruction and data caches, dual integer units, and on-chip memory management units (MMUs). The MPC8309 also includes a 32-bit PCI controller, two DMA engine

文件：311.65 Kbytes 页数：2 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

PowerQUICC II Pro Processors

文件：374.61 Kbytes 页数：2 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

PowerQUICC II Pro Processor

Overview The MPC8309 incorporates the e300c3 (MPC603e-based) core built on Power Architecture® technology, which includes 16 KB of each L1 instruction and data caches, dual integer units, and on-chip memory management units (MMUs). The MPC8309 also includes a 32-bit PCI controller, two DMA engine

文件：311.65 Kbytes 页数：2 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications

文件：480.31 Kbytes 页数：76 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

PowerQUICC II Pro Processors

文件：374.61 Kbytes 页数：2 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications

文件：453.22 Kbytes 页数：70 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications

文件：453.22 Kbytes 页数：70 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

PowerQUICC, Power Arch SoC, 200MHz, DDR2, HDLC, TDM, Enet, USB, CAN, -40 to 105C, Rev 1.1

The MPC8306 and MPC8306S are part of the cost-effective MPC830x communications processor family based on the e300 core and built on Power Architecture® technology. The devices integrate QUICC Engine® technology capable of supporting HDLC, TDM and 10/100 R/MII. The MPC8306 also supports IEEE® 1588 v2 • e300 core running up to 266 MHz\n• DDR2 @ 266 MHz\n• QUICC Engine® running up to 200 MHz • 2x HDLC/TDM\n• 3x 10/100 or 2x 10/100 w/IEEE 1588 v2 (MPC8306 only)\n• USB 2.0\n• eSDHC (boot from eSDHC support on MPC8306 only)\n• 4x CAN (MPC8306 only)\n• 4x UART\n• Local bus (boot from NOR/NAND Flash me;

恩XP

恩智浦

PowerQUICC, Power Arch SoC, 266MHz, DDR2, HDLC, TDM, Enet, USB, CAN, -40 to 105C, Rev 1.1

The MPC8306 and MPC8306S are part of the cost-effective MPC830x communications processor family based on the e300 core and built on Power Architecture® technology. The devices integrate QUICC Engine® technology capable of supporting HDLC, TDM and 10/100 R/MII. The MPC8306 also supports IEEE® 1588 v2 • e300 core running up to 266 MHz\n• DDR2 @ 266 MHz\n• QUICC Engine® running up to 200 MHz • 2x HDLC/TDM\n• 3x 10/100 or 2x 10/100 w/IEEE 1588 v2 (MPC8306 only)\n• USB 2.0\n• eSDHC (boot from eSDHC support on MPC8306 only)\n• 4x CAN (MPC8306 only)\n• 4x UART\n• Local bus (boot from NOR/NAND Flash me;

恩XP

恩智浦

PowerQUICC, Power Arch SoC, 333MHz, DDR2, HDLC, TDM, Enet, USB, CAN, -40 to 105C, Rev 1.1

The MPC8306 and MPC8306S are part of the cost-effective MPC830x communications processor family based on the e300 core and built on Power Architecture® technology. The devices integrate QUICC Engine® technology capable of supporting HDLC, TDM and 10/100 R/MII. The MPC8306 also supports IEEE® 1588 v2 • e300 core running up to 266 MHz\n• DDR2 @ 266 MHz\n• QUICC Engine® running up to 200 MHz • 2x HDLC/TDM\n• 3x 10/100 or 2x 10/100 w/IEEE 1588 v2 (MPC8306 only)\n• USB 2.0\n• eSDHC (boot from eSDHC support on MPC8306 only)\n• 4x CAN (MPC8306 only)\n• 4x UART\n• Local bus (boot from NOR/NAND Flash me;

恩XP

恩智浦