MMC

EM Clutch

MMC

Circular Connectors

MMC

Controlled with USB or Ethernet

MMC-118

8 input, 8 output Digital Audio Matrix

■Feature -8x8DigitalAudioMatrix -Balancedaudio8inputsand8outputs -HighPrecisionDSPfilter -8개의입력에대한48VPhantompower지원 Application 높은오디오품질이요구되는Announcement방송과라이브음 악,백그라운드뮤직의수요가있는곳에MMC-118은적용된다. 학교에서시간마다울리는종소리,카페의BGM,운동하는공원, 다양한주제로세미나가진행되는컨벤

MMC2001

32-bit load/store RISC architecture

Features ThemainfeaturesoftheM•COREareasfollows: •32-bitload/storeRISCarchitecture •Fixed16-bitinstructionlength •16-entry,32-bitgeneral-purposeregisterfile •Efficient4-stageexecutionpipeline,hiddenfromapplicationsoftware •Single-cycleinstructionexecutionfor

ETC

MMC2001

32-Bit Microcontroller; \n •M·CORE™ Integer Processor\n\t \n\t•32-bit RISC architecture\n\t•Low power, high performance\n\t \n \n •On-chip, 256-Kbyte ROM\n •On-chip, 32-Kbyte SRAM with battery backup supply support\n •Interrupt Controller\n\t \n\t•Support for up to 32 interrupt sources\n\t \n \n •External Interface Module (EIM)\n\t \n\t•Transfers information between the MMC2001 and external memory or periph-erals\n\t•20 address lines\n\t•16 data lines\n\t•Chip select and wait state generation\n\t•Bus watchdog timer\n\t•Timer/Reset Module\n\t•Crystal oscillator: generates the master clock signal for the time-of-day timer from a 32.768-kHz external crystal\n\t•Time-of-day timer: provides time-of-day information as well as an alarm clock function\n\t•Watchdog timer: resets the chip to recover from system failure\n\t•Reset unit: provides low voltage detection input and backup power switching for SRAM and the time-of-day timer\n\t•Periodic interrupt timer\n\t \n \n •Universal Asynchronous Receiver/Transmitter Module (UART)\n\t \n\t•Two independent UART channels\n\t•Asynchronous operation\n\t•Baud rate generation\n\t•Infrared (IR) interface support\n\t \n \n •16-bit general-purpose I/O port with support for keyboard scan/encode\n •8-bit general-purpose I/O port with support for edge/level sensitive external inter-rupts\n •Pulse-Width Modulation Module (PWM)\n\t \n\t•Six independent PWM channels\n\t•Programmable period\n\t•Programmable duty cycle\n\t•Periodic interrupt capability\n\t•Pins can be configured as general-purpose I/O\n\t \n \n •Interval Mode Serial Peripheral Interface (ISPI)\n\t \n\t•Efficient communication with slower serial peripherals\n\t•Designed for master/slave SPI operation\n\t•Interval-mode SPI operation\n\t \n \n •OnCE™ Debug Module\n;

Overview The 32-bit MMC2001 integrated processor is a charter member of the M·CORE family of microcontrollers. Representing a new vision in 32-bit microRISC processors, the M·CORE architecture delivers the power-sensitive, cutting-edge interrput/system performance that our customers demand. The processor architecture has been designed for high-performance, cost-sensitive embedded control applications, with particular emphasis on reduced system power consumption, making the MMC2001 ideal for battery-operated, portable products such as GPS, handheld industrial/medical instrumentation, cameras, industrial controllers, and others. Ultra-low power and amazing performance The M·CORE processors gives customers best-in-class power consumption from an entirely new instruction set with standard peripherials. Running on a supply voltage between 1.8 to 3.6 volts, the new device achieves sustained performance of 31 Drhy 2.1 MIPS at an internal clock speed of 33 MHz. Archived content is no longer updated and is made available for historical reference only.\n

恩XP

MMC2107

32-Bit Microcontroller; \n\t•32-bit M·CORE family M210 microRISC central processor unit capable of 31 Dhrystone 2.1 MIPS performance at 33 MHz\n\t•Commercial temperature range (-40C to +85C) operation at 33 MHz and 2.7V to 3.6V \n\t•128 Kbytes of FLASH EEPROM accessible by the M210 core in one clock cycle\n\t•8 Kbytes of SRAM for data or program storage with battery backup power input\n\t•External bus interface with 32 data lines, 4 chip selects, 23 address lines, and 4 byte enable strobes (total address space of 32 Mbytes\n\t•Separate software watchdog timer and dual periodic interrupt timers with independent counters\n\t•Interrupt controller with 40 sources, each with programmable priority and support for both normal and fast M·Core interrupt types\n\t•Master/slave mode 8-bit Serial Peripheral Interface (SPI) with mode fault detection capacity\n\t•Dual Serial Communication Interfaces (SCI) with independent baud rate generators\n\t•8-channel, 10-bit Queued Analog to Digital Converter (QADC) with dual conversion command queues, two external trigger inputs, and support for 16 externally multiplexed channels\n\t•Dual 4-channel capture/compare timers with independent counters and Pulse Width Modulation (PWM) capability\n\t•8-bit edge detect I/O port with interrupt capability\n\t•100-pin LQFP (14mm x 14mm 1.4) supports operation in singles-chip mode only with up to 67 bidirectional discrete I/O pins\n\t•144-pin LQFP (20mm x 20 mm x 1.4 mm) for applications requiring an external bus or up to 104 bidirectional discrete I/O pins in single-chip mode \n;

Overview The MMC2107 single-chip microcontroller is the first member of a family of general purpose microcontrollers based on the M210 core.It cost-effectively intergrates digital and analog peripherals with RAM, embedded FLASH memory, and a 32-bit M·Core microRISC central processor unit on a single-chip. Archived content is no longer updated and is made available for historical reference only.\n

恩XP

MMC2114

32-bit Microcontroller; \n\n• 32-bit M·CORE family M210 microRISC central processor unit capable of 31 Dhrystone 2.1 MIPS performance at 33 MHz \n• Commercial temperature range (-40C to +85C) operation at 33 MHz and 2.7V to 3.6V \n• 256 Kbytes of FLASH EEPROM accessible by the M210 core in one clock cycle\n• 32 Kbytes of SRAM for data or program storage with battery backup power input\n• Second Generation FLASH for M·CORE (SGFM) technology with simplified programming algorithms and multi-level security \n• External bus interface with 32 data lines, 4 chip selects, 23 address lines, and 4 byte enable strobes (total address space of 32 Mbytes)\n• Separate software watchdog timer and dual periodic interrupt timers with independent counters \n• Interrupt controller with 40 sources, each with programmable priority and support for both normal and fast M·CORE interrupt types\n• Low voltage detection (LVD) with reset/interrupt action \n• Master/slave mode 8-bit Serial Peripheral Interface (SPI) with mode fault detection capacity \n• Dual Serial Communication Interfaces (SCI) with independent baud rate generators\n• 8-channel, 10-bit Queued Analog to Digital Converter (QADC) with dual conversion command queues, two external trigger inputs, and support for 16 externally multiplexed channels\n• Dual 4-channel capture/compare timers with independent counters and Pulse Width Modulation (PWM)capability \n• 8-bit edge detect I/O port with interrupt capability\n• 100-pin LQFP (14mm x 14mm x 1.4mm) supports operation in singles-chip mode only with up to 67 bidirectional discrete I/O pins\n• 144-pin LQFP (20mm x 20 mm x 1.4 mm) or 196-pin MAPBGA (15mm x 15mm x 1.6mm) for applications requiring an external bus or up to 104 bidirectional discrete I/O pins in single-chip mode \n;

Overview The MMC2114 single-chip microcontroller is the second member of a family of general purpose microcontrollers based on the M210 core. It cost-effectively integrates digital and analog peripherals with RAM, embedded FLASH memory, and a 32-bit M·CORE microRISC central processor unit on a single-chip. The MMC2114 expands on the features of the popular MMC2107 with twice the FLASH and four times the amount of SRAM.\n Archived content is no longer updated and is made available for historical reference only.\n

恩XP

MMC334

MELODY GENERATOR

MELODYGENERATOR GENERALDESCRIPTION TheMMC334isalowvoltage,AI-gateCMOSintegratedcircuitthatoutputa64-notemelodey.

MMC382

BINARY/DECIMAL SPECIAL DIVIDER FOR FROQUENCY SYNTHESIS

[MICROELECTRONICS]