LOW SKEW CMOS PLL CLOCK DRIVER With Power-Down/ Power-Up Feature

The MC88921 Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor or single processor RISC systems. The PLL allows the high current, low skew outputs t

文件：106.7 Kbytes 页数：10 Pages

Motorola

摩托罗拉

LOW SKEW CMOS PLL CLOCK DRIVER With Power–Down/Power–Up Feature

The MC88921 Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor or single processor RISC systems. The PLL allows the high current, low skew outputs to

恩XP

恩智浦

LOW SKEW CMOS PLL CLOCK DRIVER With Power-Down/ Power-Up Feature

The MC88921 Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor or single processor RISC systems. The PLL allows the high current, low skew outputs t

文件：106.7 Kbytes 页数：10 Pages

Motorola

摩托罗拉

IDT
SMD

IDT

上传：深圳庞田科技有限公司

FREESCA
QFP64

FREESCA

上传：深圳市振宏微科技有限公司