Dual J-K Flip-Flop with Reset

Dual J-K Flip-Flop with Reset High–Performance Silicon–Gate CMOS The MC74HC73 is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip flop is negative–edge clocked and has an active

文件：170.82 Kbytes 页数：5 Pages

Motorola

摩托罗拉

Dual J-K Flip-Flop with Reset

Dual J-K Flip-Flop with Reset\nHigh–Performance Silicon–Gate CMOSThe MC74HC73 is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.\nEach flip flop is negative–edge clocked and has an active–low

恩XP

恩智浦

Dual J-K Flip-Flops with Clear

文件：140.08 Kbytes 页数：6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Dual J-K Flip-Flops with Clear

文件：140.08 Kbytes 页数：6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Dual J-K Flip-Flops with Clear

文件：140.08 Kbytes 页数：6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司