Dual J-K Flip-Flop with Reset High?뭁erformance Silicon?묰ate CMOS

Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS The MC74HC73A is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip−flop is negative−edge clocked and has an activ

文件：160.88 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

Dual J-K Flip-Flop with Reset

Dual J-K Flip-Flop with Reset High–Performance Silicon–Gate CMOS The MC74HC73 is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip flop is negative–edge clocked and has an active

文件：170.82 Kbytes 页数：5 Pages

Motorola

摩托罗拉

Dual J-K Flip-Flop with Reset

Dual J-K Flip-Flop with Reset High–Performance Silicon–Gate CMOS The MC74HC73 is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip flop is negative–edge clocked and has an active

文件：170.82 Kbytes 页数：5 Pages

Motorola

摩托罗拉

Dual J-K Flip-Flops with Clear

文件：140.08 Kbytes 页数：6 Pages

NSCNational Semiconductor (TI)

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