MC68HC05E5中文资料飞思卡尔数据手册PDF规格书

Introduction

The MC68HC05E5 is a low-cost introduction to the M68HC05 Family of microcontrollers (MCUs). The HC05 central processing unit (CPU) core has been enhanced with a 15-stage multifunctional timer and programmable phase-locked loop (PLL). The MCU is available in a 28-pin package and has two 8-bit input/output (I/O) ports and one 4-bit I/O port. The 8-Kbyte memory map includes 384 bytes of random access memory (RAM) and 5120 bytes of user read-only memory (ROM). The MC68HC705E5 serves as an erasable, programmable ROM (EPROM) based emulation device for the MC68HC05E5.

Features

Features of the MC68HC05E5 include:

• Low Cost

• HC05 Core

• 28-Pin Package

• On-Chip Oscillator (Crystal or Ceramic Resonator)

• Phase-Locked Loop (PLL) Synthesizer with Programmable Speed

• Synchronous Serial Interface (SSI) with Interrupts and Most Significant Bit (MSB) or Least Significant Bit (LSB) First

• M-Bus (I2C) Communication Port

• 5120 Bytes of User ROM (Including 16 Bytes of User Vectors)

• 384 Bytes of On-Chip RAM

• 15-Stage Multifunctional Timer with Programmable Input

• Real-Time Interrupt Circuit

• Computer Operating Properly (COP) Watchdog Timer Mask Option

• Custom Periodic Interrupt Circuit

• 20 Bidirectional I/O Lines

• Single-Chip Mode

• Self-Check Mode

• Power-Saving Stop and Wait Modes

• Edge-Only Sensitive or Edge- and Level-Sensitive Interrupt Trigger Mask Option

• STOP Instruction Disable Mask Option

• System Control and Status Register

• Illegal Address Reset