The MC14042B Quad Transparent Latch is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches can be reversed using the polarity input. Information present at the data input is transferred to outputs Q and Q during the clock level which is determined by the polarity input. When the polarity input is in the logic “0” state, data is transferred during the low clock level, and when the polarity input is in the logic “1” state the transfer occurs during the high clock level.

Features

• Buffered Data Inputs

• Common Clock

• Clock Polarity Control

• Q and Q Outputs

• Double Diode Input Protection

• Supply Voltage Range = 3.0 Vdc to 1 8 Vdc

• Capable of Driving Two Low−power TTL Loads or One Low−power

Schottky TTL Load Over the Rated Temperature Range

• Pb−Free Packages are Available*

MC14042B属于集成电路（IC） > 锁存器。安森美半导体公司制造生产的MC14042B锁存器锁存器是类似于触发器的基本数字存储设备，但是不同之处在于，在锁存使能（或类似命名）信号处于有效逻辑状态的任何时间，保持的逻辑状态都可以改变。“透明”锁存器还允许设备输出在锁存使能信号有效时反映输入的当前状态，而相反的是，状态仅在保持状态已固定时改变。