8-BIT SYNCHRONOUS BINARY UP COUNTER

Description The MC10E/100E016 is a high−speed synchronous, presettable, cascadable 8−bit binary counter. Architecture and operation are the same as the MC10H016 in the MECL 10H™ family, extended to 8−bits, as shown in the logic symbol. Features • 700 MHz Min. Count Frequency • 1000 ps CLK

文件：161.03 Kbytes 页数：8 Pages

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5.0 V ECL 8?묪it Synchronous Binary Up Counter

文件：175.45 Kbytes 页数：12 Pages

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5.0 VECL 8.Bit Synchronous Binary Up Counter

文件：181.14 Kbytes 页数：12 Pages

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ECL 8-Bit Up Synchronous Binary Counter

The MC10E/100E016 is a high-speed synchronous, presettable, cascadable 8-bit binary counter. Architecture and operation are the same as the MC10H016 in the MECL 10H family, extended to 8-bits, as shown in the logic symbol. The counter features internal feedback of TCbar, gated by the TCLD (terminal • 700MHz Min. Count Frequency\n• 1000ps CLK to Q, TCbar\n• Internal TCbar Feedback (Gated)\n• 8-Bit\n• Fully Synchronous Counting and TCbar Generation\n• Asynchronous Master Reset\n• PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE = 0 V\n• NECL Mode Operating Range: VCC= 0 V with VEE = -4.2 ;

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5.0 VECL 8.Bit Synchronous Binary Up Counter

文件：181.14 Kbytes 页数：12 Pages

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安森美半导体

5.0 V ECL 8?묪it Synchronous Binary Up Counter

文件：175.45 Kbytes 页数：12 Pages

ONSEMI

安森美半导体

5.0 V ECL 8?묪it Synchronous Binary Up Counter

文件：175.45 Kbytes 页数：12 Pages

ONSEMI

安森美半导体

5.0 VECL 8.Bit Synchronous Binary Up Counter

文件：181.14 Kbytes 页数：12 Pages

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安森美半导体

5.0VECL8?륛it Synchronous Binary Up Counter

文件：183.45 Kbytes 页数：11 Pages

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安森美半导体

5.0 VECL 8.Bit Synchronous Binary Up Counter

文件：181.14 Kbytes 页数：12 Pages

ONSEMI

安森美半导体