1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

文件：620.61 Kbytes 页数：10 Pages

Maxim

美信

1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver

General Description The MAX9320B low-skew, 1-to-2 differential driver is designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Features ♦ Impro

文件：120.43 Kbytes 页数：7 Pages

Maxim

美信

1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver

General Description The MAX9320B low-skew, 1-to-2 differential driver is designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Features ♦ Impro

文件：120.43 Kbytes 页数：7 Pages

Maxim

美信

1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver

General Description The MAX9320B low-skew, 1-to-2 differential driver is designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Features ♦ Impro

文件：120.43 Kbytes 页数：7 Pages

Maxim

美信