DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M74HC73 is an high speed CMOS DUAL J-K FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology ■ HIGH SPEED : fMAX = 80MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■ SYMMETRICAL OUTPUT

文件：247.47 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：323.47 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

Package：14-DIP（0.300"，7.62mm）；包装：卷带（TR） 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF JK TYPE DUAL 1BIT 14DIP

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：323.47 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

Dual J-K Flip-Flop with Reset

Dual J-K Flip-Flop with Reset High–Performance Silicon–Gate CMOS The MC74HC73 is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip flop is negative–edge clocked and has an active

文件：170.82 Kbytes 页数：5 Pages

Motorola

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