LMK04133

具有集成式 1840MHz 至 2160MHz VCO 的抖动消除器：2 路输出用于 2VPEC/LVPEC+LVDS+LVCMOS; • Cascaded PLLatinum PLL Architecture \n• PLL1Redundant Reference Inputs Loss of Signal DetectionAutomatic and Manual Selection of Reference Clock Input\n• PLL2Phase Detector Rate up to 100 MHzInput Frequency-DoublerIntegrated VCO\n \n• Outputs \n• LVPECL/2VPECL, LVDS, and LVCMOS Formats\n• Support Clock Rates up to 1080 MHz\n• Five Dedicated Channel Divider Blocks\n• Common Output Frequencies Supported: 30.72 MHz, 61.44 MHz, 62.5 MHz, 74.25 MHz, 75 MHz, 77.76 MHz, 100 MHz, 106.25 MHz, 125 MHz, 122.88 MHz, 150 MHz, 155.52 MHz, 156.25 MHz, 159.375 MHz, 187.5 MHz, 200 MHz, 212.5 MHz, 245.76 MHz, 250 MHz, 311.04 MHz, 312.5 MHz, 368.64 MHz, 491.52 MHz, 622.08 MHz, 625 MHz, 983.04 MHz\n \n• MICROWIRE (SPI) Programming Interface\n• Industrial Temperature Range: –40 to 85 °C\n• 3.15 V to 3.45 V Operation\n• Package: 48 Pin WQFN (7.0 × 7.0 × 0.8 mm);

The LMK04100 family of precision clock conditioners provides jitter cleaning, clock multiplication and distribution without the need for high-performance VCXO modules. When connected to a recovered system reference clock and a VCXO, the device generates 5 low jitter clocks in LVCMOS, LVDS, or LVPECL formats.

LMK04133

Clock Jitter Cleaner with Cascaded PLLs

LMK04133

Family Clock Jitter Cleaner

LMK04133

LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs

LMK04133EVAL

Precision Clock Conditioner with Dual PLLs and Integrated VCO

LMK04133SQ

Clock Jitter Cleaner with Cascaded PLLs

LMK04133SQ

LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs

LMK04133SQ/NOPB

Family Clock Jitter Cleaner

LMK04133SQE

LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs

LMK04133SQE/NOPB

Family Clock Jitter Cleaner