LH28F160S5H-L中文资料夏普微数据手册PDF规格书

DESCRIPTION

The LH28F160S5-L/S5H-L flash memories with Smart 5 technology are high-density, low-cost, nonvolatile, read/write storage solution for a wide range of applications, having high programming performance is achieved through highly-optimized page buffer operations. Their symmetrically-blocked architecture, flexible voltage and enhanced cycling capability provide for highly flexible component suitable for resident flash arrays, SIMMs and memory cards. Their enhanced suspend capabilities provide for an ideal solution for code + data storage applications.

FEATURES

• Smart 5 technology

– 5 V VCC

– 5 V VPP

• High speed write performance

– Two 32-byte page buffers

– 2 µs/byte write transfer rate

• Common Flash Interface (CFI)

– Universal & upgradable interface

• Scalable Command Set (SCS)

• High performance read access time

LH28F160S5-L70

– 70 ns (5.0±0.25 V)/80 ns (5.0±0.5 V)

LH28F160S5H-L70

– 70 ns (5.0±0.25 V)/90 ns (5.0±0.5 V)

LH28F160S5-L10/S5H-L10

– 100 ns (5.0±0.5 V)

• Enhanced automated suspend options

– Write suspend to read

– Block erase suspend to write

– Block erase suspend to read

• Enhanced data protection features

– Absolute protection with VPP = GND

– Flexible block locking

– Erase/write lockout during power transitions

• SRAM-compatible write interface

• User-configurable x8 or x16 operation

• High-density symmetrically-blocked architecture

– Thirty-two 64 k-byte erasable blocks

• Enhanced cycling capability

– 100 000 block erase cycles

– 3.2 million block erase cycles/chip

• Low power management

– Deep power-down mode

– Automatic power saving mode decreases ICC

in static mode

• Automated write and erase

– Command user interface

– Status register

• ETOXTM∗ V nonvolatile flash technology

• Packages

– 56-pin TSOP Type I (TSOP056-P-1420)

Normal bend/Reverse bend

– 56-pin SSOP (SSOP056-P-0600)★

[LH28F160S5-L]

– 64-ball CSP (FBGA064-P-0811)

– 64-pin SDIP (SDIP064-P-0750)★