KM681002CLJ-10中文资料三星数据手册PDF规格书

GENERAL DESCRIPTION

The KM681002C is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8 bits. The KM681002C uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG¢s advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The KM681002C is packaged in a 400mil 32-pin plastic SOJ or TSOP2 forward.

FEATURES

• Fast Access Time 10,12,15,20ns(Max.)

• Low Power Dissipation

Standby (TTL) : 30mA(Max.) (CMOS) : 5mA(Max.) 0.5mA(Max.) L-ver. only

Operating KM681002C/CL-10 : 80mA(Max.)

KM681002C/CL-12 : 75mA(Max.)

KM681002C/CL-15 : 73mA(Max.)

KM681002C/CL-20 : 70mA(Max.)

• Single 5.0V±10 Power Supply

• TTL Compatible Inputs and Outputs

• I/O Compatible with 3.3V Device

• Fully Static Operation

- No Clock or Refresh required

• Three State Outputs

• 2V Minimum Data Retention; L-ver. only

• Center Power/Ground Pin Configuration

• Standard Pin Configuration

KM681002C/CLJ : 32-SOJ-400

KM681002C/CLT : 32-TSOP2-400CF