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K4H560838M-TCB0中文资料PDF规格书
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Features
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Four banks operation
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
• Data I/O transactions on both edges of data strobe
• Edge aligned data output, center aligned data input
• LDM,UDM/DM for write masking only
• Auto & Self refresh
• 15.6us refresh interval(4K/64ms refresh)
• Maximum burst refresh cycle : 8
• 66pin TSOP II package
产品属性
- 型号:
K4H560838M-TCB0
- 制造商:
SAMSUNG
- 制造商全称:
Samsung semiconductor
- 功能描述:
128Mb DDR SDRAM
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
SAMSUNG |
23+ |
TSOP |
20000 |
原厂原装正品现货 |
询价 | ||
SAMSUNG |
ROHS+Original |
NA |
40 |
专业电子元器件供应链/QQ 350053121 /正纳电子 |
询价 | ||
SAMSUNG |
23+ |
TSOP |
8890 |
价格优势/原装现货/客户至上/欢迎广大客户来电查询 |
询价 | ||
SAMSUNG |
23+ |
NA |
40 |
专业电子元器件供应链正迈科技特价代理QQ1304306553 |
询价 | ||
SAMSUNG |
2018+ |
SOP |
30617 |
三星闪存专营品牌店全新原装热卖 |
询价 | ||
SAM |
1844+ |
SOP |
6528 |
只做原装正品假一赔十为客户做到零风险!! |
询价 | ||
SAMSUNG |
22+23+ |
TSSOP |
31646 |
绝对原装正品全新进口深圳现货 |
询价 | ||
Samsung |
2023+ |
TSOP |
80000 |
一级代理/分销渠道价格优势 十年芯程一路只做原装正品 |
询价 | ||
SAMSUNG/三星 |
19+ |
TSSOP |
24320 |
进口原装现货 |
询价 | ||
SAMSUNG/三星 |
18+ |
TSOP |
33078 |
全新原装现货,可出样品,可开增值税发票 |
询价 |