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K4H511638C-TLA0中文资料PDF规格书
相关芯片规格书
更多- K4H511638C-TCB0
- K4H511638B-TLA0
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- K4H511638C-TCA2
- K4H511638B-TLB0
- K4H511638B-TCB0
- K4H511638B-TCA0
- K4H511638C-TCA0
- K4H511638B-TLA2
- K4H511638B-TC/LB3
- K4H511638B-TC/LB0
- K4H511638B-UC/LCC
- K4H511638B-TC/LA2
- K4H511638B-UC/LB3
- K4H511638B-GC/LB3
- K4H511638B-GC/LCC
- K4H511638B-GC/LB0
- K4H511638B-ZC/LCC
K4H511638C-TLA0规格书详情
Features
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Four banks operation
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
• Data I/O transactions on both edges of data strobe
• Edge aligned data output, center aligned data input
• LDM,UDM/DM for write masking only
• Auto & Self refresh
• 15.6us refresh interval(4K/64ms refresh)
• Maximum burst refresh cycle : 8
• 66pin TSOP II package
产品属性
- 型号:
K4H511638C-TLA0
- 制造商:
SAMSUNG
- 制造商全称:
Samsung semiconductor
- 功能描述:
128Mb DDR SDRAM
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
SAMSUNG |
6000 |
面议 |
19 |
DIP/SMD |
询价 | ||
SAM |
TSOP |
402 |
价格优势!军工IC一级分销商!可开增值税发票! |
询价 | |||
SAMSUNG |
17+ |
TSOP66 |
9988 |
只做原装进口,自己库存 |
询价 | ||
SAMSUNG |
05+ |
TSOP66 |
3960 |
全新原装进口自己库存优势 |
询价 | ||
SAMSUNG |
23+ |
TSSOP |
1005 |
优势库存 |
询价 | ||
- |
NA |
13000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
询价 | |||
SAMSUNG |
23+ |
TSOP |
20000 |
原厂原装正品现货 |
询价 | ||
SAMSUNG |
2020+ |
TSOP |
16800 |
绝对原装进口现货,假一赔十,价格优势!? |
询价 | ||
ON/安森美 |
23+ |
SOP-8 |
69820 |
终端可以免费供样,支持BOM配单! |
询价 | ||
SAMSANG |
19+ |
TSOP |
256800 |
原厂代理渠道,每一颗芯片都可追溯原厂; |
询价 |