High-level-language support is easily implemented through a register-based architecture， large address space， powerful addressing modes， flexible instruction set， and_well-supported floating-point arithmetic.

For additional information when designing for cold temperature operation， please see Texas Instruments application report 320C3x， 320C4x and_320MCM42x Power-up Sensitivity at Cold Temperature， literature number SGUA001.

The SMJ320C31， SMJ320LC31， and_SMQ320LC31 digital signal processors (DSPs) are 32-bit， floating-point processors manufactured in 0.6-μm triple-level-metal CMOS technology. The devices are part of the SMJ320C3x generation of DSPs from Texas Instruments.

The SMJ320C3x internal busing and_special digital-signal-processing instruction set have the speed and_flexibility to execute up to 60 MFLOPS. The SMJ320C3x optimizes speed by implementing functions in hardware that other processors implement through software or microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.

The SMJ320C3x can perform parallel multiply and_ALU operations on integer or floating-point data in a single cycle. Each processor also possesses a general-purpose register file， a program cache， dedicated ARAUs， internal dual-access memories， one DMA channel supporting concurrent I/O， and_a short machine-cycle time. High performance and_ease of use are results of these features.

General-purpose applications are greatly enhanced by the large address space， multiprocessor interface， internally and_externally generated wait states， one external interface port， two timers， one serial port， and_multiple-interrupt structure. The SMJ320C3x supports a wide variety of system applications from host processor to dedicated coprocessor.

High-level-language support is easily implemented through a register-based architecture， large address space， powerful addressing modes， flexible instruction set， and_well-supported floating-point arithmetic.