3.3V, 125-MHz, Multi-Output Zero Delay Buffer

Functional Description The Z9973 has an integrated PLL that provides low-skew and low-jitter clock outputs for high-performance microprocessors. Three independent banks of four outputs as well as an independent PLL feedback output, FB_OUT, provide exceptional flexibility for possible output confi

文件：97.72 Kbytes 页数：9 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

Dual Driver/Comparator/Load with Internal DACs

文件：382.38 Kbytes 页数：26 Pages

Maxim

美信

Dual Driver/Comparator/Load with Internal DACs

文件：382.38 Kbytes 页数：26 Pages

Maxim

美信

Dual Driver/Comparator/Load with Internal DACs

文件：382.38 Kbytes 页数：26 Pages

Maxim

美信